1. Field of the Invention
The following description relates, in general, to a display driving circuit that may serve to prevent latch-up, and, more particularly, to a display driving circuit, in which a second driving voltage output from a second voltage generation unit is connected to a latch-up prevention unit having a plurality of switching means and is grounded for a preset period of time, thus being a display driving circuit that may serve to prevent an occurrence of latch-up.
2. Description of the Related Art
Generally, a Liquid Crystal Display (LCD) is an electric device for converting various types of electrical information, generated by various devices, into visual information using variation in the transmissivity of liquid crystal depending on an applied voltage, and for transmitting the visual information. An LCD is a kind of flat panel display, which requires a backlight due to its lack of self-luminescence, but has low power consumption and is easily used for portable devices, and thus the frequency of use of LCDs has increased.
A driving device for driving such an LCD includes a plurality of voltage generation units for generating a driving voltage required to drive an LCD panel and a plurality of voltages required to drive the peripheral devices of the LCD panel, and is configured to display electrical information as visual information by supplying respective generated voltages as time passes.
Hereinafter, a conventional display driving circuit will be described below with reference to related drawings.
FIG. 1 is a block diagram showing a conventional display driving circuit, FIGS. 2B and 2B are a circuit diagram and a sectional view showing the transistor of the first voltage generation unit of FIG. 1, FIG. 3 is a block diagram showing the second voltage generation unit of FIG. 1, and FIG. 4 is a circuit diagram showing the second voltage generation unit of FIG. 3.
As shown in FIG. 1, the conventional display driving circuit includes first to third voltage generation units 110, 120 and 130 for generating different voltages, respectively.
In this case, the first voltage generation unit 110 is connected both to a display panel (not shown) and to the second voltage generation unit 120, and is configured to receive an externally applied input voltage VCI, to output a first source voltage VCH, required to operate the display panel, and to supply the first source voltage VCH to the display panel.
The second voltage generation unit 120 is connected to the display panel and the first and third voltage generation units 110 and 130, and is configured to receive the input voltage VCI and to output first and second driving voltages VGH and VGL, required to turn on/off respective cells of the display panel, thus enabling the display panel to be turned on/off.
Further, the third voltage generation unit 130 is connected both to the display panel and to the second voltage generation unit 120, and is configured to receive the input voltage VCI, output a second source voltage VCL, required to operate the display panel, and supply the second source voltage VCL to the display panel.
In particular, the second voltage generation unit 120 must generate the second driving voltage VGL after the first and second source voltages VCH and VCL have been generated by the first voltage generation unit 110 and the second voltage generation unit 130, respectively.
At this time, as shown in FIG. 2, which shows a transistor M1 among the devices constituting the first voltage generation unit 110, the transistor M1 must always transmit a voltage having a predetermined magnitude in order to charge a capacitor C1 connected to the transistor M1. However, since excessive current is generated at the time of initially applying the input voltage VCI, there is a problem in that latch-up occurs.
That is, as shown in FIG. 2B, which shows the section of the transistor M1, the transistor M1 is configured such that, when the first source voltage VCH in a steady state is higher than the input voltage VCI, current flows along the path (1). However, when the input voltage VCI is initially applied, the first source voltage VCH, which is the voltage output from the transistor M1, is initialized to OV by a capacitor C1 having OV as an initial value, and thus excessive current is generated and flows into the transistor M1 along a path (2).
An N-type well is filled with holes along the path (2) shown in the transistor M1 due to the excessive current generated when the input voltage VCI is initially applied, and the holes flow into the lower portion of a substrate along a path (3), and thus the voltage of the lower portion of the substrate increases.
In this case, the lower portion of the substrate is a place at which the second driving voltage VGL is generated by the second voltage generation unit 120, and the increase in the voltage of the lower portion of the substrate is equal to the increase in the second driving voltage VGL. In particular, the first and second source voltages VCH and VCL and the first and second driving voltages VGH and VGL, which are output from the display driving circuit, must be sequentially output. However, there is a problem in that, when the voltage of the lower portion of the substrate increases along the path (3), as described above, the second driving voltage VGL has a predetermined magnitude before it is output, and thus latch-up occurs.
Further, as shown in FIG. 3, the second voltage generation unit 120 includes a logic signal generation unit 121, a level shifting unit 122, and a charging unit 123, and is operated such that, after the operation of the charging unit 123 has been completed, a second driving voltage VGL is output.
However, as shown in FIG. 4, which shows the level shifting unit 122, a through current, flowing from the first and second source voltages VCH and VCL and the first driving voltage VGH to the second driving voltage VGL, is generated by the level shifting unit 122 along a path (1). In this case, there is a problem in that the second driving voltage VGL is output early, out of sequence of the generation thereof, due to the through current generated along the path (1), and thus latch-up occurs.
Further, as shown in FIG. 5, which is a block diagram showing another embodiment of a conventional display driving circuit, a circuit for preventing the occurrence of latch-up according to another embodiment is configured such that a Schottky diode 240, for grounding the second driving voltage VGL until the time point at which the second driving voltage VGL is generated is reached, is connected to a second voltage generation unit 220 in the lower portion of a substrate. At this time, the anode of the Schottky diode 240 is connected to the second driving voltage output terminal (not shown) of the second voltage generation unit 220, and the cathode thereof is grounded.
Accordingly, when the second driving voltage VGL is higher than the conduction voltage of the Schottky diode 240 for the reasons shown in FIGS. 2 and 2B and FIGS. 3 and 4, the second driving voltage VGL is grounded, and thus the occurrence of latch-up can be prevented.
However, there is a problem in that, since the Schottky diode 240 is separately manufactured, without being manufactured together with a display driving circuit, at the time of manufacturing the display driving circuit, and is attached to the display driving circuit, the costs increase in proportion to the cost of the materials for the Schottky diode 240.
Further, there is a problem in that, since a space corresponding to the size of the Schottky diode 240 is required in order to attach the Schottky diode to the display driving circuit, the size of the display driving circuit increases in proportion to the size of the Schottky diode 240.